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dc.contributorGundersen, Runeen_GB
dc.contributorBlom, Haralden_GB
dc.date.accessioned2018-10-29T12:21:41Z
dc.date.available2018-10-29T12:21:41Z
dc.date.issued2000
dc.identifier
dc.identifier.isbn82-464-0396-6en_GB
dc.identifier.other2000/00138
dc.identifier.urihttp://hdl.handle.net/20.500.12242/1773
dc.description.abstractThis report conlains a description of a floating-point adder optimized for throughput rather than latecy. It is confirmed with lEEE-754 standard for binary floating-point arithmetic. The design is fully tested and verified. Synthesis results for the A1catel Mietec MTC45000 technology are presented.en_GB
dc.language.isonoben_GB
dc.titleAddisjonskrets for IEEE-754 flyttall : optimalisert for gjennomstrømningen_GB
dc.subject.keywordIntegrerte kretseren_GB
dc.source.issue2000/00138en_GB
dc.source.pagenumber85en_GB


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